
Field Programmable Gate Array (FPGA) with 101,261 logic cells and 126,576 registers, built on 45nm process technology. This device features 4824 Kbit of RAM, 360 18x18 multipliers, and 180 dedicated DSP slices. It offers 102 user I/Os and operates with a transceiver speed of 3.2 Gbps. The FPGA is housed in a 144-pin Thin Quad Flat Package (TQFP) with a 0.5mm pin pitch, suitable for surface mounting. Operating temperature range is 0°C to 85°C.
Xilinx XC6SLX100-L1TQG144C technical specifications.
| Basic Package Type | Lead-Frame SMT |
| Package Family Name | QFP |
| Package/Case | TQFP |
| Package Description | Thin Quad Flat Package |
| Lead Shape | Gull-wing |
| Pin Count | 144 |
| PCB | 144 |
| Package Length (mm) | 20 |
| Package Width (mm) | 20 |
| Package Height (mm) | 1.4 |
| Seated Plane Height (mm) | 1.6(Max) |
| Pin Pitch (mm) | 0.5 |
| Package Material | Plastic |
| Mounting | Surface Mount |
| Jedec | MS-026BFB |
| Family Name | Spartan®-6 LX |
| Maximum Number of User I/Os | 102 |
| Number of Registers | 126576 |
| RAM Bits | 4824Kbit |
| Device Logic Cells | 101261 |
| Process Technology | 45nm |
| Number of Multipliers | 360 (18x18) |
| Programmability | Yes |
| Transceiver Speed | 3.2Gbps |
| Program Memory Type | SRAM |
| Min Operating Temperature | 0°C |
| Max Operating Temperature | 85°C |
| Dedicated DSP | 180 |
| Speed Grade | 1L |
| Device Number of DLLs/PLLs | 18 |
| Total Number of Block RAM | 268 |
| Cage Code | 68994 |
| EU RoHS | Yes |
| HTS Code | 8542390001 |
| Schedule B | 8542390000 |
| ECCN | EAR99 |
| Automotive | No |
| AEC Qualified | No |
| PPAP | No |
| Radiation Hardening | No |
| RoHS Versions | 2011/65/EU, 2015/863 |
Download the complete datasheet for Xilinx XC6SLX100-L1TQG144C to view detailed technical specifications.
This datasheet cannot be embedded due to technical restrictions.