
Field Programmable Gate Array (FPGA) featuring 14,579 logic cells and 18,224 registers, built on 45nm process technology. This device offers 576 Kbit of RAM, 64 integrated 18x18 multipliers, and 32 dedicated DSP blocks. It supports transceiver speeds up to 3.2 Gbps and includes 32 Block RAMs and 6 DLLs/PLLs. The FPGA is housed in a 225-pin Chip Scale Ball Grid Array (CSBGA) package with a 0.8mm pin pitch, designed for surface mounting. Operating temperature range is -40 °C to 100 °C.
Xilinx XC6SLX16-3CSG225I technical specifications.
| Basic Package Type | Ball Grid Array |
| Package Family Name | BGA |
| Package/Case | CSBGA |
| Package Description | Chip Scale Ball Grid Array |
| Lead Shape | Ball |
| Pin Count | 225 |
| PCB | 225 |
| Package Length (mm) | 13 |
| Package Width (mm) | 13 |
| Package Height (mm) | 0.9 |
| Seated Plane Height (mm) | 1.4(Max) |
| Pin Pitch (mm) | 0.8 |
| Package Material | Plastic |
| Mounting | Surface Mount |
| Family Name | Spartan®-6 LX |
| Maximum Number of User I/Os | 160 |
| Number of Registers | 18224 |
| RAM Bits | 576Kbit |
| Device Logic Cells | 14579 |
| Process Technology | 45nm |
| Number of Multipliers | 64 (18x18) |
| Programmability | Yes |
| Transceiver Speed | 3.2Gbps |
| Program Memory Type | SRAM |
| Min Operating Temperature | -40°C |
| Max Operating Temperature | 100°C |
| Dedicated DSP | 32 |
| Speed Grade | 3 |
| Device Number of DLLs/PLLs | 6 |
| Total Number of Block RAM | 32 |
| Cage Code | 68994 |
| EU RoHS | Yes |
| HTS Code | 8542390001 |
| Schedule B | 8542390000 |
| ECCN | EAR99 |
| Automotive | No |
| AEC Qualified | No |
| PPAP | No |
| Radiation Hardening | No |
| RoHS Versions | 2002/95/EC |
Download the complete datasheet for Xilinx XC6SLX16-3CSG225I to view detailed technical specifications.
This datasheet cannot be embedded due to technical restrictions.