
Field Programmable Gate Array (FPGA) with 14,579 logic cells and 18,224 registers, built on 45nm process technology. Features 576 Kbit RAM, 64 18x18 multipliers, and 32 dedicated DSP blocks. Offers 232 maximum user I/Os and supports external memory interfaces including DDR, DDR2, DDR3, and LPDDR SDRAM. Operates with a transceiver speed of 3.2 Gbps and includes 6 DLLs/PLLs. Packaged in a 324-pin Chip Scale Ball Grid Array (CSBGA) with a 0.8mm pin pitch, suitable for surface mounting. Extended operating temperature range from -40°C to 100°C.
Xilinx XC6SLX16-3CSG324I technical specifications.
| Basic Package Type | Ball Grid Array |
| Package Family Name | BGA |
| Package/Case | CSBGA |
| Package Description | Chip Scale Ball Grid Array |
| Lead Shape | Ball |
| Pin Count | 324 |
| PCB | 324 |
| Package Length (mm) | 15 |
| Package Width (mm) | 15 |
| Package Height (mm) | 0.9 |
| Seated Plane Height (mm) | 1.5(Max) |
| Pin Pitch (mm) | 0.8 |
| Package Material | Plastic |
| Mounting | Surface Mount |
| Package Orientation | Yes |
| Package Orientation Marking Type | Dot |
| Jedec | MO-275KKAB-1 |
| Family Name | Spartan®-6 LX |
| Maximum Number of User I/Os | 232 |
| Number of Registers | 18224 |
| RAM Bits | 576Kbit |
| Device Logic Cells | 14579 |
| Process Technology | 45nm |
| Number of Multipliers | 64 (18x18) |
| Programmability | Yes |
| Transceiver Speed | 3.2Gbps |
| Program Memory Type | SRAM |
| Min Operating Temperature | -40°C |
| Max Operating Temperature | 100°C |
| Dedicated DSP | 32 |
| Speed Grade | 3 |
| External Memory Interface | DDR SDRAM|DDR2 SDRAM|DDR3 SDRAM|LPDDR SDRAM |
| Device Number of DLLs/PLLs | 6 |
| Total Number of Block RAM | 32 |
| Cage Code | 68994 |
| EU RoHS | Yes |
| HTS Code | 8542390001 |
| Schedule B | 8542390000 |
| ECCN | 3A991.d |
| Automotive | No |
| AEC Qualified | No |
| PPAP | No |
| Radiation Hardening | No |
| RoHS Versions | 2011/65/EU, 2015/863 |
Download the complete datasheet for Xilinx XC6SLX16-3CSG324I to view detailed technical specifications.
This datasheet cannot be embedded due to technical restrictions.