Field Programmable Gate Array (FPGA) with 24,051 logic cells and 30,064 registers. Features 936 Kbit RAM, 76 (18x18) multipliers, and 38 dedicated DSP blocks. Supports up to 226 user I/Os and offers 6 DLLs/PLLs. Operates on 45nm technology with a 1.2V core voltage. Includes 52 block RAMs and external memory interfaces for DDR, DDR2, DDR3, and LPDDR SDRAM. Transceiver speed reaches 3.2 Gbps. Packaged in a 324-pin CSBGA (Chip Scale Ball Grid Array) with a 0.8mm pin pitch, measuring 15mm x 15mm x 0.9mm, suitable for surface mounting.
PackageCSBGA
MountingSurface Mount
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Technical Specifications
Xilinx XC6SLX25-2CSG324C technical specifications.
General
Basic Package Type
Ball Grid Array
Package Family Name
BGA
Package/Case
CSBGA
Package Description
Chip Scale Ball Grid Array
Lead Shape
Ball
Pin Count
324
PCB
324
Package Length (mm)
15
Package Width (mm)
15
Package Height (mm)
0.9
Seated Plane Height (mm)
1.5(Max)
Pin Pitch (mm)
0.8
Package Material
Plastic
Mounting
Surface Mount
Package Orientation
Yes
Package Orientation Marking Type
Dot
Jedec
MO-275KKAB-1
Family Name
Spartan®-6 LX
Maximum Number of User I/Os
226
Number of Registers
30064
RAM Bits
936Kbit
Device Logic Cells
24051
Process Technology
45nm
Number of Multipliers
76 (18x18)
Programmability
Yes
Transceiver Speed
3.2Gbps
Program Memory Type
SRAM
Min Operating Temperature
0°C
Max Operating Temperature
85°C
Dedicated DSP
38
Speed Grade
2
External Memory Interface
DDR SDRAM|DDR2 SDRAM|DDR3 SDRAM|LPDDR SDRAM
Device Number of DLLs/PLLs
6
Total Number of Block RAM
52
Compliance
Cage Code
68994
EU RoHS
Yes
HTS Code
8542390001
Schedule B
8542390000
ECCN
3A991.d
Automotive
No
AEC Qualified
No
PPAP
No
Radiation Hardening
No
RoHS Versions
2011/65/EU, 2015/863
Datasheet
Xilinx XC6SLX25-2CSG324C Datasheet
Download the complete datasheet for Xilinx XC6SLX25-2CSG324C to view detailed technical specifications.
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