Field Programmable Gate Array (FPGA) with 24,051 logic cells and 30,064 registers, built on 45nm process technology. Features 936 Kbit RAM, 76 dedicated 18x18 multipliers, and 38 dedicated DSP blocks. Offers 102 user I/Os and 6 DLLs/PLLs. Operates with a transceiver speed of 3.2 Gbps. Packaged in a 144-pin Thin Quad Flat Package (TQFP) with a 0.5mm pin pitch, suitable for surface mounting.
PackageTQFP
MountingSurface Mount
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Technical Specifications
Xilinx XC6SLX25-3TQG144C technical specifications.
General
| Basic Package Type | Lead-Frame SMT |
| Package Family Name | QFP |
| Package/Case | TQFP |
| Package Description | Thin Quad Flat Package |
| Lead Shape | Gull-wing |
| Pin Count | 144 |
| PCB | 144 |
| Package Length (mm) | 20 |
| Package Width (mm) | 20 |
| Package Height (mm) | 1.4 |
| Seated Plane Height (mm) | 1.6(Max) |
| Pin Pitch (mm) | 0.5 |
| Package Material | Plastic |
| Mounting | Surface Mount |
| Jedec | MS-026BFB |
| Family Name | Spartan®-6 LX |
| Maximum Number of User I/Os | 102 |
| Number of Registers | 30064 |
| RAM Bits | 936Kbit |
| Device Logic Cells | 24051 |
| Process Technology | 45nm |
| Number of Multipliers | 76 (18x18) |
| Programmability | Yes |
| Transceiver Speed | 3.2Gbps |
| Program Memory Type | SRAM |
| Min Operating Temperature | 0°C |
| Max Operating Temperature | 85°C |
| Dedicated DSP | 38 |
| Speed Grade | 3 |
| Device Number of DLLs/PLLs | 6 |
| Total Number of Block RAM | 52 |
Compliance
| Cage Code | 68994 |
| EU RoHS | Yes |
| HTS Code | 8542390001 |
| Schedule B | 8542390000 |
| ECCN | EAR99 |
| Automotive | No |
| AEC Qualified | No |
| PPAP | No |
| Radiation Hardening | No |
| RoHS Versions | 2011/65/EU, 2015/863 |
Datasheet
Xilinx XC6SLX25-3TQG144C Datasheet
Download the complete datasheet for Xilinx XC6SLX25-3TQG144C to view detailed technical specifications.
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