
Field Programmable Gate Array (FPGA) with 24,051 logic cells and 30,064 registers, built on 45nm process technology. Features 936 Kbit RAM, 76 dedicated 18x18 multipliers, and 38 dedicated DSP blocks. Includes 2 transceiver blocks operating at 3.2 Gbps and 1 PCI block. Packaged in a 900-pin Fine Pitch Ball Grid Array (FBGA) for surface mounting, with a package size of 31x31 mm and 1 mm pin pitch. Operates within a temperature range of 0°C to 85°C.
Xilinx XC6SLX25T-4FG900C technical specifications.
| Basic Package Type | Ball Grid Array |
| Package Family Name | BGA |
| Package/Case | FBGA |
| Package Description | Fine Pitch Ball Grid Array |
| Lead Shape | Ball |
| Pin Count | 900 |
| PCB | 900 |
| Package Length (mm) | 31 |
| Package Width (mm) | 31 |
| Package Height (mm) | 1.75 |
| Seated Plane Height (mm) | 2.25 |
| Pin Pitch (mm) | 1 |
| Package Material | Plastic |
| Mounting | Surface Mount |
| Jedec | MS-034 |
| Family Name | Spartan®-6 LXT |
| Maximum Number of User I/Os | 576 |
| Number of Registers | 30064 |
| RAM Bits | 936Kbit |
| Device Logic Cells | 24051 |
| Process Technology | 45nm |
| Number of Multipliers | 76 (18x18) |
| Programmability | Yes |
| Transceiver Blocks | 2 |
| Transceiver Speed | 3.2Gbps |
| Program Memory Type | SRAM |
| Min Operating Temperature | 0°C |
| Max Operating Temperature | 85°C |
| Dedicated DSP | 38 |
| PCI Blocks | 1 |
| Speed Grade | 4 |
| Device Number of DLLs/PLLs | 6 |
| Total Number of Block RAM | 52 |
| Cage Code | 68994 |
| EU RoHS | No |
| HTS Code | 8542390001 |
| Schedule B | 8542390000 |
| ECCN | 3A991.d |
| Automotive | No |
| AEC Qualified | No |
| PPAP | No |
| Radiation Hardening | No |
| RoHS Versions | 2011/65/EU, 2015/863 |
Download the complete datasheet for Xilinx XC6SLX25T-4FG900C to view detailed technical specifications.
This datasheet cannot be embedded due to technical restrictions.