Field Programmable Gate Array (FPGA) with 3840 logic cells and 4800 registers, featuring 216 Kbit of RAM and 16 dedicated 18x18 multipliers. This 45nm process technology device offers 576 maximum user I/Os and 8 dedicated DSP blocks. It operates at 1.2V, supports transceiver speeds up to 3.2 Gbps, and utilizes SRAM for program memory. Packaged in a 900-pin Fine Pitch Ball Grid Array (FBGA) with a 1mm pin pitch, it is designed for surface mounting and operates within a temperature range of 0°C to 85°C.
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Xilinx XC6SLX4-2FG900C technical specifications.
| Basic Package Type | Ball Grid Array |
| Package Family Name | BGA |
| Package/Case | FBGA |
| Package Description | Fine Pitch Ball Grid Array |
| Lead Shape | Ball |
| Pin Count | 900 |
| PCB | 900 |
| Package Length (mm) | 31 |
| Package Width (mm) | 31 |
| Package Height (mm) | 1.75 |
| Seated Plane Height (mm) | 2.25 |
| Pin Pitch (mm) | 1 |
| Package Material | Plastic |
| Mounting | Surface Mount |
| Jedec | MS-034 |
| Family Name | Spartan®-6 LX |
| Maximum Number of User I/Os | 576 |
| Number of Registers | 4800 |
| RAM Bits | 216Kbit |
| Device Logic Cells | 3840 |
| Process Technology | 45nm |
| Number of Multipliers | 16 (18x18) |
| Programmability | Yes |
| Transceiver Speed | 3.2Gbps |
| Program Memory Type | SRAM |
| Min Operating Temperature | 0°C |
| Max Operating Temperature | 85°C |
| Dedicated DSP | 8 |
| Speed Grade | 2 |
| Device Number of DLLs/PLLs | 6 |
| Total Number of Block RAM | 12 |
| Cage Code | 68994 |
| EU RoHS | No |
| HTS Code | 8542390001 |
| Schedule B | 8542390000 |
| ECCN | 3A991.d |
| Automotive | No |
| AEC Qualified | No |
| PPAP | No |
| Radiation Hardening | No |
| RoHS Versions | 2011/65/EU, 2015/863 |
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