Field Programmable Gate Array (FPGA) with 3840 logic cells and 4800 registers, featuring 216 Kbit RAM and 16 dedicated 18x18 multipliers. This 45nm technology device operates at 1.2V and supports transceiver speeds up to 3.2 Gbps. Housed in a 256-pin Fine Pitch Thin Ball Grid Array (FTBGA) package measuring 17mm x 17mm x 1mm, it offers 186 maximum user I/Os and 12 Block RAMs. Designed for surface mounting, it operates within a temperature range of 0°C to 85°C.
PackageFTBGA
MountingSurface Mount
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Technical Specifications
Xilinx XC6SLX4-2FT256C technical specifications.
General
| Basic Package Type | Ball Grid Array |
| Package Family Name | BGA |
| Package/Case | FTBGA |
| Package Description | Fine Pitch Thin Ball Grid Array |
| Lead Shape | Ball |
| Pin Count | 256 |
| PCB | 256 |
| Package Length (mm) | 17 |
| Package Width (mm) | 17 |
| Package Height (mm) | 1 |
| Seated Plane Height (mm) | 1.4 |
| Pin Pitch (mm) | 1 |
| Package Material | Plastic |
| Mounting | Surface Mount |
| Jedec | MS-034AAF-1 |
| Family Name | Spartan®-6 LX |
| Maximum Number of User I/Os | 186 |
| Number of Registers | 4800 |
| RAM Bits | 216Kbit |
| Device Logic Cells | 3840 |
| Process Technology | 45nm |
| Number of Multipliers | 16 (18x18) |
| Programmability | Yes |
| Transceiver Speed | 3.2Gbps |
| Program Memory Type | SRAM |
| Min Operating Temperature | 0°C |
| Max Operating Temperature | 85°C |
| Dedicated DSP | 8 |
| Speed Grade | 2 |
| Device Number of DLLs/PLLs | 6 |
| Total Number of Block RAM | 12 |
Compliance
| Cage Code | 68994 |
| EU RoHS | No |
| HTS Code | 8542390001 |
| Schedule B | 8542390000 |
| ECCN | EAR99 |
| Automotive | No |
| AEC Qualified | No |
| PPAP | No |
| Radiation Hardening | No |
| RoHS Versions | 2011/65/EU, 2015/863 |
Datasheet
Xilinx XC6SLX4-2FT256C Datasheet
Download the complete datasheet for Xilinx XC6SLX4-2FT256C to view detailed technical specifications.
This datasheet cannot be embedded due to technical restrictions.