
Field Programmable Gate Array (FPGA) with 43,661 logic cells and 54,576 registers, built on 45nm process technology. Features 2,088 Kbit RAM bits, 116 (18x18) multipliers, and 58 dedicated DSP blocks. Offers 218 maximum user I/Os and 116 total block RAMs. Operates with a transceiver speed of 3.2 Gbps and a speed grade of 3. Packaged in a 324-pin Chip Scale Ball Grid Array (CSBGA) with a 0.8mm pin pitch, suitable for surface mounting. Extended operating temperature range from -40°C to 100°C.
Xilinx XC6SLX45-3CSG324I technical specifications.
| Basic Package Type | Ball Grid Array |
| Package Family Name | BGA |
| Package/Case | CSBGA |
| Package Description | Chip Scale Ball Grid Array |
| Lead Shape | Ball |
| Pin Count | 324 |
| PCB | 324 |
| Package Length (mm) | 15 |
| Package Width (mm) | 15 |
| Package Height (mm) | 0.9 |
| Seated Plane Height (mm) | 1.5(Max) |
| Pin Pitch (mm) | 0.8 |
| Package Material | Plastic |
| Mounting | Surface Mount |
| Family Name | Spartan®-6 LX |
| Maximum Number of User I/Os | 218 |
| Number of Registers | 54576 |
| RAM Bits | 2088Kbit |
| Device Logic Cells | 43661 |
| Process Technology | 45nm |
| Number of Multipliers | 116 (18x18) |
| Programmability | Yes |
| Transceiver Speed | 3.2Gbps |
| Program Memory Type | SRAM |
| Min Operating Temperature | -40°C |
| Max Operating Temperature | 100°C |
| Dedicated DSP | 58 |
| Speed Grade | 3 |
| Device Number of DLLs/PLLs | 12 |
| Total Number of Block RAM | 116 |
| Cage Code | 68994 |
| EU RoHS | Yes |
| HTS Code | 8542390001 |
| Schedule B | 8542390000 |
| ECCN | 3A991.d |
| Automotive | No |
| AEC Qualified | No |
| PPAP | No |
| Radiation Hardening | No |
| RoHS Versions | 2011/65/EU, 2015/863 |
Download the complete datasheet for Xilinx XC6SLX45-3CSG324I to view detailed technical specifications.
This datasheet cannot be embedded due to technical restrictions.