
Field Programmable Gate Array (FPGA) with 74,637 logic cells and 93,296 registers, built on 45nm process technology. Features 3096 Kbit RAM, 264 (18x18) multipliers, and 132 dedicated DSP blocks. Offers 328 maximum user I/Os and supports external memory interfaces including DDR, DDR2, DDR3, and LPDDR SDRAM. This 484-pin Chip Scale Ball Grid Array (CSBGA) package is designed for surface mounting with a 0.8mm pin pitch and operates within a 0°C to 85°C temperature range.
Xilinx XC6SLX75-2CSG484C technical specifications.
| Basic Package Type | Ball Grid Array |
| Package Family Name | BGA |
| Package/Case | CSBGA |
| Package Description | Chip Scale Ball Grid Array |
| Lead Shape | Ball |
| Pin Count | 484 |
| PCB | 484 |
| Package Length (mm) | 19 |
| Package Width (mm) | 19 |
| Package Height (mm) | 1.35(Max) |
| Seated Plane Height (mm) | 1.8(Max) |
| Pin Pitch (mm) | 0.8 |
| Package Material | Plastic |
| Mounting | Surface Mount |
| Package Orientation | Yes |
| Package Orientation Marking Type | Dot |
| Family Name | Spartan®-6 LX |
| Maximum Number of User I/Os | 328 |
| Number of Registers | 93296 |
| RAM Bits | 3096Kbit |
| Device Logic Cells | 74637 |
| Process Technology | 45nm |
| Number of Multipliers | 264 (18x18) |
| Programmability | Yes |
| Transceiver Speed | 3.2Gbps |
| Program Memory Type | SRAM |
| Min Operating Temperature | 0°C |
| Max Operating Temperature | 85°C |
| Dedicated DSP | 132 |
| Speed Grade | 2 |
| External Memory Interface | DDR SDRAM|DDR2 SDRAM|DDR3 SDRAM|LPDDR SDRAM |
| Device Number of DLLs/PLLs | 18 |
| Total Number of Block RAM | 172 |
| Cage Code | 68994 |
| EU RoHS | Yes |
| HTS Code | 8542390001 |
| Schedule B | 8542390000 |
| ECCN | 3A991.d |
| Automotive | No |
| AEC Qualified | No |
| PPAP | No |
| Radiation Hardening | No |
| RoHS Versions | 2011/65/EU, 2015/863 |
Download the complete datasheet for Xilinx XC6SLX75-2CSG484C to view detailed technical specifications.
This datasheet cannot be embedded due to technical restrictions.