
Field Programmable Gate Array (FPGA) with 74,637 logic cells and 93,296 registers, built on 45nm process technology. Features 3096 Kbit RAM, 132 dedicated DSP slices, and 264 integrated 18x18 multipliers. Offers 186 user I/Os and 18 DLLs/PLLs, with 172 Block RAMs. Operates at 1.2V with a transceiver speed of 3.2 Gbps. Packaged in a 256-pin FTBGA (Fine Pitch Thin Ball Grid Array) with a 17mm x 17mm footprint, suitable for surface mounting.
Xilinx XC6SLX75-3FTG256C technical specifications.
| Basic Package Type | Ball Grid Array |
| Package Family Name | BGA |
| Package/Case | FTBGA |
| Package Description | Fine Pitch Thin Ball Grid Array |
| Lead Shape | Ball |
| Pin Count | 256 |
| PCB | 256 |
| Package Length (mm) | 17 |
| Package Width (mm) | 17 |
| Package Height (mm) | 1 |
| Seated Plane Height (mm) | 1.4 |
| Pin Pitch (mm) | 1 |
| Package Material | Plastic |
| Mounting | Surface Mount |
| Jedec | MS-034AAF-1 |
| Family Name | Spartan®-6 LX |
| Maximum Number of User I/Os | 186 |
| Number of Registers | 93296 |
| RAM Bits | 3096Kbit |
| Device Logic Cells | 74637 |
| Process Technology | 45nm |
| Number of Multipliers | 264 (18x18) |
| Programmability | Yes |
| Transceiver Speed | 3.2Gbps |
| Program Memory Type | SRAM |
| Min Operating Temperature | 0°C |
| Max Operating Temperature | 85°C |
| Dedicated DSP | 132 |
| Speed Grade | 3 |
| Device Number of DLLs/PLLs | 18 |
| Total Number of Block RAM | 172 |
| Cage Code | 68994 |
| EU RoHS | Yes |
| HTS Code | 8542390001 |
| Schedule B | 8542390000 |
| ECCN | EAR99 |
| Automotive | No |
| AEC Qualified | No |
| PPAP | No |
| Radiation Hardening | No |
| RoHS Versions | 2011/65/EU |
Download the complete datasheet for Xilinx XC6SLX75-3FTG256C to view detailed technical specifications.
This datasheet cannot be embedded due to technical restrictions.