Field Programmable Gate Array (FPGA) with 9152 logic cells and 11440 registers, featuring 576 Kbit RAM and 32 dedicated 18x18 multipliers. This device offers 338 maximum user I/Os, 16 dedicated DSP blocks, and 32 total Block RAMs. Fabricated on 45nm process technology, it operates at 1.2V with a transceiver speed of 3.2 Gbps. The FPGA is housed in a 484-pin Fine Pitch Ball Grid Array (FBGA) package, measuring 23mm x 23mm x 1.7mm, designed for surface mounting. Operating temperature range is 0°C to 85°C.
PackageFBGA
MountingSurface Mount
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Technical Specifications
Xilinx XC6SLX9-2FG484C technical specifications.
General
| Basic Package Type | Ball Grid Array |
| Package Family Name | BGA |
| Package/Case | FBGA |
| Package Description | Fine Pitch Ball Grid Array |
| Lead Shape | Ball |
| Pin Count | 484 |
| PCB | 484 |
| Package Length (mm) | 23 |
| Package Width (mm) | 23 |
| Package Height (mm) | 1.7 |
| Seated Plane Height (mm) | 2.2 |
| Pin Pitch (mm) | 1 |
| Package Material | Plastic |
| Mounting | Surface Mount |
| Family Name | Spartan®-6 LX |
| Maximum Number of User I/Os | 338 |
| Number of Registers | 11440 |
| RAM Bits | 576Kbit |
| Device Logic Cells | 9152 |
| Process Technology | 45nm |
| Number of Multipliers | 32 (18x18) |
| Programmability | Yes |
| Transceiver Speed | 3.2Gbps |
| Program Memory Type | SRAM |
| Min Operating Temperature | 0°C |
| Max Operating Temperature | 85°C |
| Dedicated DSP | 16 |
| Speed Grade | 2 |
| Device Number of DLLs/PLLs | 6 |
| Total Number of Block RAM | 32 |
Compliance
| Cage Code | 68994 |
| EU RoHS | No |
| HTS Code | 8542390001 |
| Schedule B | 8542390000 |
| ECCN | 3A991.d |
| Automotive | No |
| AEC Qualified | No |
| PPAP | No |
| Radiation Hardening | No |
| RoHS Versions | 2011/65/EU, 2015/863 |
Datasheet
Xilinx XC6SLX9-2FG484C Datasheet
Download the complete datasheet for Xilinx XC6SLX9-2FG484C to view detailed technical specifications.
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