
Field Programmable Gate Array (FPGA) with 9152 logic cells and 11440 registers. Features 576 Kbit RAM, 32 (18x18) multipliers, and 16 dedicated DSP slices. Operates on 45nm process technology with a transceiver speed of 3.2 Gbps. Housed in a 900-pin Fine Pitch Ball Grid Array (FBGA) package, measuring 31x31x1.75mm with a 1mm pin pitch, suitable for surface mounting. Supports 576 user I/Os and includes 6 DLLs/PLLs. Operating temperature range is 0°C to 85°C.
Xilinx XC6SLX9-2FGG900C technical specifications.
| Basic Package Type | Ball Grid Array |
| Package Family Name | BGA |
| Package/Case | FBGA |
| Package Description | Fine Pitch Ball Grid Array |
| Lead Shape | Ball |
| Pin Count | 900 |
| PCB | 900 |
| Package Length (mm) | 31 |
| Package Width (mm) | 31 |
| Package Height (mm) | 1.75 |
| Seated Plane Height (mm) | 2.25 |
| Pin Pitch (mm) | 1 |
| Package Material | Plastic |
| Mounting | Surface Mount |
| Jedec | MS-034 |
| Family Name | Spartan®-6 LX |
| Maximum Number of User I/Os | 576 |
| Number of Registers | 11440 |
| RAM Bits | 576Kbit |
| Device Logic Cells | 9152 |
| Process Technology | 45nm |
| Number of Multipliers | 32 (18x18) |
| Programmability | Yes |
| Transceiver Speed | 3.2Gbps |
| Program Memory Type | SRAM |
| Min Operating Temperature | 0°C |
| Max Operating Temperature | 85°C |
| Dedicated DSP | 16 |
| Speed Grade | 2 |
| Device Number of DLLs/PLLs | 6 |
| Total Number of Block RAM | 32 |
| Cage Code | 68994 |
| EU RoHS | Yes |
| HTS Code | 8542390001 |
| Schedule B | 8542390000 |
| ECCN | 3A991.d |
| Automotive | No |
| AEC Qualified | No |
| PPAP | No |
| Radiation Hardening | No |
| RoHS Versions | 2011/65/EU |
Download the complete datasheet for Xilinx XC6SLX9-2FGG900C to view detailed technical specifications.
This datasheet cannot be embedded due to technical restrictions.