
Field Programmable Gate Array (FPGA) with 9152 logic cells and 11440 registers, featuring 576 Kbit of RAM and 32 (18x18) multipliers. This 45nm technology device offers 200 user I/Os, 16 dedicated DSP slices, and 6 DLLs/PLLs. It operates at 1.2V with a transceiver speed of 3.2 Gbps and is housed in a 324-pin Chip Scale Ball Grid Array (CSBGA) package, measuring 15x15x0.9mm with a 0.8mm pin pitch, suitable for surface mounting. Programmable via SRAM, it operates within a temperature range of 0°C to 85°C.
Xilinx XC6SLX9-3CSG324C technical specifications.
| Basic Package Type | Ball Grid Array |
| Package Family Name | BGA |
| Package/Case | CSBGA |
| Package Description | Chip Scale Ball Grid Array |
| Lead Shape | Ball |
| Pin Count | 324 |
| PCB | 324 |
| Package Length (mm) | 15 |
| Package Width (mm) | 15 |
| Package Height (mm) | 0.9 |
| Seated Plane Height (mm) | 1.5(Max) |
| Pin Pitch (mm) | 0.8 |
| Package Material | Plastic |
| Mounting | Surface Mount |
| Family Name | Spartan®-6 LX |
| Maximum Number of User I/Os | 200 |
| Number of Registers | 11440 |
| RAM Bits | 576Kbit |
| Device Logic Cells | 9152 |
| Process Technology | 45nm |
| Number of Multipliers | 32 (18x18) |
| Programmability | Yes |
| Transceiver Speed | 3.2Gbps |
| Program Memory Type | SRAM |
| Min Operating Temperature | 0°C |
| Max Operating Temperature | 85°C |
| Dedicated DSP | 16 |
| Speed Grade | 3 |
| Device Number of DLLs/PLLs | 6 |
| Total Number of Block RAM | 32 |
| Cage Code | 68994 |
| EU RoHS | Yes |
| HTS Code | 8542390001 |
| Schedule B | 8542390000 |
| ECCN | 3A991.d |
| Automotive | No |
| AEC Qualified | No |
| PPAP | No |
| Radiation Hardening | No |
| RoHS Versions | 2011/65/EU, 2015/863 |
Download the complete datasheet for Xilinx XC6SLX9-3CSG324C to view detailed technical specifications.
This datasheet cannot be embedded due to technical restrictions.