
Field Programmable Gate Array (FPGA) with 128,000 logic cells and 160,000 registers. Features 9504 Kbit RAM, 480 dedicated DSP multipliers (25x18), and 16 transceiver blocks operating at 3.75 Gbps. This 40nm technology device offers 600 maximum user I/Os and includes 1 Ethernet MAC and 2 PCI blocks. Packaged in a 1156-pin Flip Chip Ball Grid Array (FCBGA) measuring 35x35mm for surface mounting, with an operating temperature range of -40°C to 100°C.
Xilinx XC6VCX130T-2FF1156I technical specifications.
| Basic Package Type | Ball Grid Array |
| Package Family Name | BGA |
| Package/Case | FCBGA |
| Package Description | Flip Chip Ball Grid Array |
| Lead Shape | Ball |
| Pin Count | 1156 |
| PCB | 1156 |
| Package Length (mm) | 35 |
| Package Width (mm) | 35 |
| Package Height (mm) | 2.9(Max) |
| Seated Plane Height (mm) | 3.5(Max) |
| Pin Pitch (mm) | 1 |
| Package Material | Plastic |
| Mounting | Surface Mount |
| Family Name | Virtex®-6 CXT |
| Maximum Number of User I/Os | 600 |
| Number of Registers | 160000 |
| RAM Bits | 9504Kbit |
| Device Logic Cells | 128000 |
| Process Technology | 40nm |
| Ethernet MACs | 1 |
| Number of Multipliers | 480 (25x18) |
| Programmability | Yes |
| Transceiver Blocks | 16 |
| Transceiver Speed | 3.75Gbps |
| Program Memory Type | Flash |
| Min Operating Temperature | -40°C |
| Max Operating Temperature | 100°C |
| Dedicated DSP | 480 |
| PCI Blocks | 2 |
| Speed Grade | 2 |
| Total Number of Block RAM | 264 |
| Cage Code | 68994 |
| EU RoHS | No |
| HTS Code | 8542390001 |
| Schedule B | 8542390000 |
| ECCN | 3A991.d |
| Automotive | No |
| AEC Qualified | No |
| PPAP | No |
| Radiation Hardening | No |
| RoHS Versions | 2011/65/EU, 2015/863 |
Download the complete datasheet for Xilinx XC6VCX130T-2FF1156I to view detailed technical specifications.
This datasheet cannot be embedded due to technical restrictions.