Programmable Logic Device (PLD) featuring 128 macrocells and a 10ns propagation delay. This CMOS device operates with a maximum clock frequency of 95MHz and a nominal supply voltage of 3.3V, ranging from 2.7V to 3.6V. It offers 84 I/O lines and is housed in a 100-terminal, lead-free Quad Flat Package (QFP) with a JEDEC code of S-PQFP-G100. Designed for industrial temperature ranges, it supports operation from -40°C to 85°C.
Xilinx XCR3128XL-10VQG100I technical specifications.
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