CMOS complete direct digital synthesizer generates programmable frequency, phase, and amplitude cosine outputs for agile LO, clock generator, modulation, and chirp applications. The device integrates a 48-bit DDS core, dual 12-bit DACs, a high speed comparator, an inverse sinc filter, a digital multiplier, and a programmable 4× to 20× reference clock multiplier. It operates from a 3.3 V single supply and supports 10 MHz SPI-compatible serial programming or 100 MHz 8-bit parallel programming. The device is specified for −40°C to +85°C operation and is offered in 80-lead LQFP and exposed-pad TQFP package options.
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| Device Type | Complete DDS |
| Process Technology | 0.35 μm CMOS |
| Supply Voltage | 3.3 ±5%V |
| Internal System Clock Frequency | 300 maxMHz |
| Output Update Speed | 300 maxMSPS |
| DAC Resolution | 12bit |
| Number of DACs | 2 |
| Frequency Tuning Word Width | 48bit |
| Frequency Resolution | 1 at 300 MHz SYSCLKμHz |
| Maximum Output Frequency | 150MHz |
| Phase Offset Register Width | 14bit |
| Amplitude Modulation Resolution | 12bit |
| Reference Clock Multiplier Range | 4× to 20× |
| Serial Interface Clock | 10 maxMHz |
| Parallel Programming Rate | 100 maxMHz |
| Comparator Output Jitter | 4.0ps rms |
| Operating Temperature Range | -40 to +85°C |
| Package Options | 80-lead TQFP_EP; 80-lead LQFP |
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Technical instructions for synchronizing multiple AD9852 and AD9854 DDS ICs to achieve precise phase relationships between sinusoidal or square wave output signals.
