Low-power stereo audio codec integrates 24-bit ADC and DAC channels with a programmable SigmaDSP audio processor. The codec supports audio sample rates from 8 kHz to 96 kHz and includes an integrated PLL for flexible clocking. Digital control is provided through I2C or SPI, and serial audio data is supported through common formats including I2S and TDM. The device operates from low-voltage analog, digital, and I/O supplies and is specified for industrial temperature operation.
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| Audio ADC resolution | 24bit |
| Audio DAC resolution | 24bit |
| Maximum sample rate | 96kHz |
| Minimum sample rate | 8kHz |
| ADC channels | 2 |
| DAC channels | 2 |
| Digital signal processor | SigmaDSP |
| Control interface | I2C or SPI |
| Audio interface formats | I2S and TDM |
| Clocking | Integrated PLL |
| Operating temperature range | -40 to 85°C |
| Package options | 32-lead LFCSP; 32-ball WLCSP |
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These are design resources that include the Analog Devices ADAU1761
User manual for the ADAA24XX-EV-B2BX evaluation board, used to validate A2B transceivers and peripherals with SigmaDSP processors and audio codecs.
