Mixed-signal control processor combines an ARM Cortex-M4 core with floating-point support and an ARM Cortex-M0 supervisor core. The device provides up to 1 Mbyte of ECC flash and up to 160 Kbytes of zero-wait-state ECC SRAM for the Cortex-M4 subsystem. Its analog front end includes 16-bit ADC resources, a 14-bit auxiliary ADC, a 12-bit DAC, comparators, and precision 2.5 V reference outputs. The processor operates from a single 3.3 V external and analog supply architecture with a specified junction temperature range from -40 °C to +125 °C. The ADSP-CM419F pre-release configuration is documented in a 210-ball chip-scale BGA package.
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| Core architecture | ARM Cortex-M4 with ARM Cortex-M0 supervisor |
| Cortex-M4 maximum frequency | 240MHz |
| Cortex-M0 maximum frequency | 100MHz |
| Flash memory | Up to 1 ECCMbyte |
| Cortex-M4 SRAM | Up to 160 zero-wait-state ECCKbyte |
| Cortex-M0 SRAM | 32 zero-wait-state ECCKbyte |
| External supply voltage | 3.3 nominalV |
| Junction temperature range | -40 to +125°C |
| Primary ADC resolution | 16bit |
| Analog input channels | 31-channel analog front end |
| Multiplexed primary ADC inputs | 24 |
| Auxiliary ADC resolution | 14bit |
| Auxiliary ADC inputs | 7 |
| DAC resolution | 12bit |
| PWM channels | 24 |
| CAN interfaces | 2 CAN 2.0B |
| UART interfaces | Up to 5 |
| SPI interfaces | 2 |
| Package | 210-ball 15 mm x 15 mm BGA |
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