CPLD MAX® Family 2.5K Gates 128 Macro Cells 83.3MHz 0.65um Technology 5V 68-Pin PLCC
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| Access Time | 15ns |
| Package/Case | PLCC |
| Frequency | 100MHz |
| Lead Free | Contains Lead |
| Max Operating Temperature | 70°C |
| Min Operating Temperature | 0°C |
| Max Supply Voltage | 5.25V |
| Memory Type | EPROM, |
| Min Supply Voltage | 4.75V |
| Mount | Surface Mount |
| Number of Logic Blocks (LABs) | 8 |
| Number of Macrocells | 10 |
| Operating Supply Voltage | 5V |
| Packaging | Rail/Tube |
| Propagation Delay | 15ns |
| RoHS Compliant | No |
| RoHS | Not Compliant |
