Skip to main content
Application NoteNxp

AN14138 PN7642 Design-In Recommendations

Guidelines for designing NFC systems with NXP PN7642, covering DPC 2.0 calibration, power management, TX/RX optimization, and NFC Cockpit configuration.

View application note

Overview

This application note provides technical recommendations for implementing the NXP PN7642 NFC reader frontend. It focuses on the Dynamic Power Control (DPC 2.0) architecture, which utilizes an integrated DC-DC boost converter and TXLDO to optimize power delivery and transmitter performance. The document outlines essential calibration procedures, including current reduction LUT configuration, antenna tuning, and the adjustment of Adaptive Waveform Control (AWC) and Adaptive Receiver Control (ARC) settings. It details how to use the NFC Cockpit software tool for analog optimization and EEPROM management without direct firmware coding, ensuring compliance with ISO and NFC standards across various antenna designs.

Use Cases

  • NFC reader hardware design
  • Contactless payment terminal development
  • Secure access control systems
  • NFC antenna calibration and optimization
  • Battery-powered NFC device power management

Topics

PN7642
NFC
DPC 2.0
NFC Cockpit
AWC
ARC
DC-DC Converter
TXLDO
Antenna Tuning
Transmitter Shaping

Referenced Parts

PN7462

NXP Semiconductors

Normally the transmitter (TX) of the PN7462 is automatically controlled by the firmware.

PN7642

NXP Semiconductors

The overall concept of the PN7642 is based on powerful and flexible NFC frontend hardware, which is controlled by the internal open μC and its firmware.

AN14138 PN7642 Design-In Recommendations | Design Resources