MC68040
NXP
MC68040
Application NoteNxp
AN2039: Bus Arbitration State Machine for MC68040 and MC68360
Application note describing a bus arbitration state machine and block diagram for interfacing the NXP MC68040 with multiple MC68360 QUICC processors.
Overview
This document details the implementation of a bus arbitration logic system for designs incorporating the NXP MC68040 and MC68360 (QUICC) processors. It describes a state machine where the MC68040 is assigned the highest priority, followed by the MC68360 Slave 1 and Slave 2. The design includes a detailed block diagram illustrating the signal connections for Bus Request (BR), Bus Grant (BG), and Bus Grant Acknowledge (BGACK) between the external arbiter, the master QUICC, and the additional slave devices.
Use Cases
- Implementing bus arbitration in multi-processor systems
- Designing interface logic between MC68040 and MC68360 processors
- Developing state machines for shared bus resource management
Topics
NXP
MC68360
MC68040
Bus Arbitration
QUICC
Arbiter
State Machine
AN2039
BGACK
Bus Grant
Referenced Parts
MC68360
NXP
MC68360-M MC68360-S1 MC68360-S2
| MC68040 | NXP | MC68040 |
| MC68360 | NXP | MC68360-M MC68360-S1 MC68360-S2 |