MPC5121e
NXP
This document describes the procedures needed to perform NAND flash boot with a Freescale MPC5121e.
This application note describes procedures for NAND flash boot with the MPC5121e MCU, including hardware preparation, register configuration, and U-Boot software implementation.
This document outlines the hardware and software configuration required to enable NAND flash boot on the NXP (formerly Freescale) MPC5121e microcontroller. Using the ADS512101 development system as a reference, it details the configuration of the Reset Configuration Word High Register (RCWHR) fields including ROMLOC, NFC_PS, and NFC_DBW. The note describes the complete initialization sequence for the NAND Flash Controller (NFC), DRAM setup, and the process of copying the system image from NFC RAM to DRAM. It also provides specific instructions for patching U-Boot version 2008.10 to support NAND boot functionality on the SK Hynix HY27UG088G5M memory module.
MPC5121e
NXP
This document describes the procedures needed to perform NAND flash boot with a Freescale MPC5121e.
HY27UG088G5M
SK Hynix
The ADS512101 uses a Hynix HY27UG088G(5/D)M 1 GB NAND flash which has a ×8 bus width
| MPC5121e | NXP | This document describes the procedures needed to perform NAND flash boot with a Freescale MPC5121e. |
| HY27UG088G5M | SK Hynix | The ADS512101 uses a Hynix HY27UG088G(5/D)M 1 GB NAND flash which has a ×8 bus width |