DSP56321
Freescale Semiconductor
EFCOP programming chapter in the DSP56321 Reference Manual (DSP56321RM)
Application NoteNxp
Applied Matrix Multiplication With the DSP563xx Enhanced Filter Coprocessor (EFCOP)
Details implementing matrix multiplication on the DSP563xx series using the Enhanced Filter Coprocessor (EFCOP) through polling or DMA with interrupts.
Overview
This application note demonstrates matrix multiplication techniques utilizing the DSP563xx Enhanced Filter Coprocessor (EFCOP). While the EFCOP is primarily designed for FIR and IIR filtering, its multichannel FIR capabilities can be configured for matrix operations with minimal CPU intervention. The document explains how to map matrix elements to Filter Data Memory (FDM) and Filter Coefficient Memory (FCM), configure filter length and channel counts based on matrix dimensions, and implement the process using either software polling or DMA with interrupts. Detailed configuration steps and code examples are provided for the DSP56321 and broader DSP56300 series processors.
Use Cases
- Signal processing optimization
- Mathematical vector calculations
- Real-time control systems
- Efficient FIR filter implementation
Topics
DSP563xx
EFCOP
Matrix Multiplication
DSP56321
Enhanced Filter Coprocessor
FIR Filtering
Digital Signal Processor
DMA
Multichannel FIR
Referenced Parts
DSP56300
Freescale Semiconductor
Programming the DSP56300 Enhanced Filter Coprocessor (EFCOP) (APR39)
| DSP56321 | Freescale Semiconductor | EFCOP programming chapter in the DSP56321 Reference Manual (DSP56321RM) |
| DSP56300 | Freescale Semiconductor | Programming the DSP56300 Enhanced Filter Coprocessor (EFCOP) (APR39) |