KW47
NXP
The KW47 microcontroller integrates two Arm Cortex-M33 cores, one of which resides in the Narrowband Unit (NBU).
This application note explains how to use the NXP KW47 dual-core architecture and Narrowband Unit (NBU) to offload tasks and improve embedded system performance.
This document provides a technical overview of leveraging the dual-core architecture of the NXP KW47 microcontroller to enhance performance. The KW47 integrates two Arm Cortex-M33 cores: a primary core for main application processing and a secondary core located within the Narrowband Unit (NBU). While the NBU is primarily designed for the radio subsystem, it can be utilized as a general-purpose processor to handle heavy computational tasks. The note describes Inter-Processor Communication (IPC) mechanisms, including the Messaging Unit (MU) and shared SRAM (SMU2), and demonstrates a use case where Fast Fourier Transform (FFT) calculations are offloaded to the NBU to maintain system responsiveness on the main core.
KW47
NXP
The KW47 microcontroller integrates two Arm Cortex-M33 cores, one of which resides in the Narrowband Unit (NBU).
| KW47 | NXP | The KW47 microcontroller integrates two Arm Cortex-M33 cores, one of which resides in the Narrowband Unit (NBU). |