Cyclic Redundant Checker Calculation on Power Architecture Technology and Comparison of Big-Endian Versus Little-Endian
Application note detailing CRC calculations on Power Architecture devices like the MPC5744P, comparing big-endian vs. little-endian formats and specific CRC polynomials.
Overview
This technical document explains the implementation of Cyclic Redundant Checker (CRC) algorithms on NXP Qorivva devices, specifically focusing on the MPC5744P. It clarifies the differences between big-endian and little-endian data storage and explains why CRC results may differ between Power Architecture (LSB-first calculation) and PCs (MSB-first calculation). The document provides specific generating polynomials for CRC-8 (VDA CAN), CRC-16-CCITT, and CRC-32 (Ethernet). It also includes a description of an example C++ program used to calculate CRCs following the Power Architecture sequence with zero-wait state pipelining.
Use Cases
- Error detection in data transmission and storage
- Implementing CAN bus CRC-8 validation
- Ethernet and MPEG-2 data integrity checking
- Porting CRC algorithms from PC to embedded Power Architecture systems
- Software-based CRC calculation verification
Topics
Referenced Parts
| MPC5744P | Freescale Semiconductor | This application note focuses on CRC on the MPC5744P. |