DSP56800EF Digital Signal Controller Cores Reference Manual

Overview

This reference manual provides a comprehensive technical overview of the NXP DSP56800EF Digital Signal Controller (DSC) cores. It describes the core architecture, which extends the DSP56800, DSP56800E, and DSP56800EX architectures. The document details the dual Harvard memory architecture, the Data Arithmetic Logic Unit (ALU), the Address Generation Unit (AGU), and the Bit-Manipulation Unit. It provides in-depth information on data types—including signed/unsigned integer and fractional formats—and memory alignment for bytes, words, and longwords. The manual also covers various addressing modes such as register-direct, indirect, absolute, and bit-reverse, alongside an introduction to the instruction set for arithmetic, multiplication, and shifting operations.

Referenced Parts