MPC107
Freescale Semiconductor
MPC107 PCI Bridge/Memory Controller User’s Manual
Design DocumentNxp
Errata for MPC107 PCI Bridge/Memory Controller User’s Manual
Critical corrections for the MPC107 PCI Bridge/Memory Controller, including updated register settings, address mapping, signal states, and wait state timing tables.
Overview
This errata document provides official corrections and technical updates for the MPC107 PCI Bridge/Memory Controller User’s Manual, Rev. 0. It includes revised specifications for the INT signal state during system reset and updated address mapping for PCI memory space. The document provides corrected bit settings for configuration registers, including MCCR2, MCCR4, and PICR2, specifically detailing the serialization of configuration writes. Technical tables for ROM high-impedance wait states are updated for SDRAM-based systems. Additionally, it clarifies data bit mapping between the PowerPC 60x bus and the PCI bus to ensure proper data alignment.
Use Cases
- Hardware system design using MPC107
- Firmware and driver development
- Memory controller configuration and debugging
- System reset and signal state verification
- PCI bus to processor bus data mapping
Topics
MPC107
PCI Bridge
Memory Controller
PowerPC 60x bus
MCCR2
MCCR4
PICR2
Errata
Address Mapping
NXP
Motorola
Freescale
Referenced Parts
MPC8240
Freescale Semiconductor
Note that the sense of this bit is the opposite of that on the MPC8240.
PowerPC 603e
Motorola
The PowerPC name, the PowerPC logotype, and PowerPC 603e are trademarks of International Business Machines Corporation used by Motorola
| MPC107 | Freescale Semiconductor | MPC107 PCI Bridge/Memory Controller User’s Manual |
| MPC8240 | Freescale Semiconductor | Note that the sense of this bit is the opposite of that on the MPC8240. |
| PowerPC 603e | Motorola | The PowerPC name, the PowerPC logotype, and PowerPC 603e are trademarks of International Business Machines Corporation used by Motorola |