LPC5500
NXP
This document focuses on LPC5500’s series flash operation.
Application NoteNxp
Flash Programming Tips for LPC5500 Series
Technical guide for flash memory operations on NXP LPC5500 MCUs, covering ROM APIs, Protected Flash Regions (PFR), and ECC-related HardFault prevention.
Overview
This application note provides implementation details and best practices for operating the internal flash memory of the NXP LPC5500 series Arm Cortex-M33 microcontrollers. It defines the flash layout, including the 32 KB sector size and 512-byte page size, and explains the Protected Flash Region (PFR) used for configuration storage. The document outlines critical constraints, such as limiting the core clock to 100 MHz during programming and erasure, and using the provided ROM APIs instead of direct register access to prevent accidental erasure of the PFR. Additionally, it addresses how to avoid HardFaults caused by internal ECC management when reading erased flash by using the FLASH_VerifyErase API.
Use Cases
- Firmware development for LPC5500 microcontrollers
- Implementing safe In-Application Programming (IAP) routines
- Configuring Protected Flash Regions (PFR) for secure storage
- Troubleshooting HardFaults during memory read operations
- Optimizing flash erase and program cycles in embedded systems
Topics
LPC5500
LPC55S6x
LPC55S2x
LPC55S1x
Flash Programming
ROM API
Protected Flash Region
PFR
Cortex-M33
ECC Management
HardFault
In-Application Programming
Referenced Parts
LPC552x
NXP
Chapter 2: LPC55S6x/LPC55S2x/LPC552x Memory Map
LPC55S00
NXP
The LPC55S00 is a family of Arm® Cortex® -M33-based MCUs for embedded applications.
LPC55S1x
NXP
The PFR size of LPC55S1x is 12 KB, located in 0x0003_D000 – 0x0003_FFFF.
LPC55S2x
NXP
Chapter 2: LPC55S6x/LPC55S2x/LPC552x Memory Map
LPC55S6x
NXP
Chapter 2: LPC55S6x/LPC55S2x/LPC552x Memory Map
LPC1800
NXP
Compared with legacy LPC parts, LPC4300, LPC54000, LPC1800, LPC800, the LPC5500 uses new flash IP
LPC4300
NXP
Compared with legacy LPC parts, LPC4300, LPC54000, LPC1800, LPC800, the LPC5500 uses new flash IP
LPC54000
NXP
Compared with legacy LPC parts, LPC4300, LPC54000, LPC1800, LPC800, the LPC5500 uses new flash IP
LPC800
NXP
Compared with legacy LPC parts, LPC4300, LPC54000, LPC1800, LPC800, the LPC5500 uses new flash IP
| LPC5500 | NXP | This document focuses on LPC5500’s series flash operation. |
| LPC552x | NXP | Chapter 2: LPC55S6x/LPC55S2x/LPC552x Memory Map |
| LPC55S00 | NXP | The LPC55S00 is a family of Arm® Cortex® -M33-based MCUs for embedded applications. |
| LPC55S1x | NXP | The PFR size of LPC55S1x is 12 KB, located in 0x0003_D000 – 0x0003_FFFF. |
| LPC55S2x | NXP | Chapter 2: LPC55S6x/LPC55S2x/LPC552x Memory Map |
| LPC55S6x | NXP | Chapter 2: LPC55S6x/LPC55S2x/LPC552x Memory Map |
| LPC1800 | NXP | Compared with legacy LPC parts, LPC4300, LPC54000, LPC1800, LPC800, the LPC5500 uses new flash IP |
| LPC4300 | NXP | Compared with legacy LPC parts, LPC4300, LPC54000, LPC1800, LPC800, the LPC5500 uses new flash IP |
| LPC54000 | NXP | Compared with legacy LPC parts, LPC4300, LPC54000, LPC1800, LPC800, the LPC5500 uses new flash IP |
| LPC800 | NXP | Compared with legacy LPC parts, LPC4300, LPC54000, LPC1800, LPC800, the LPC5500 uses new flash IP |