MIMX9352
NXP
nxpele -f mimx9352 -d uboot_fastboot read-common-fuse -i 129
Application NoteNxp
Fuse Usage on i.MX Devices (AN14954)
Technical guide for managing and programming eFuses on NXP i.MX processors, covering OCOTP_CTRL, ELE-AP architectures, fuse maps, and software access via U-Boot and Linux.
Overview
This application note describes the architecture and operation of eFuses (electronic fuses) within NXP i.MX processor families. eFuses are permanent, one-time programmable (OTP) non-volatile bits used to store immutable configurations such as boot settings, MAC addresses, silicon IDs, and secure boot keys. The document details the OCOTP_CTRL module and the Fuse Status Block (FSB) interface, explaining how fuse data is loaded into shadow registers for software access. It categorizes device access methods based on security subsystems, including EdgeLock Enclave (ELE-AP) for i.MX 8 and i.MX 9 series versus standard system memory access for older i.MX 6/7 series. Practical instructions are provided for calculating bank and word indices, alongside command-line examples for reading and programming fuses using U-Boot, System Manager (SM), and the Linux nvmem driver.
Use Cases
- Configuring device boot modes and parameters
- Programming unique silicon identifiers and MAC addresses
- Storing secure boot keys and lifecycle flags
- Managing permanent hardware feature enablement
- Overriding fuse settings using shadow registers for development
Topics
eFuse
i.MX
NXP
OCOTP_CTRL
ELE-AP
EdgeLock Enclave
Non-volatile memory
Boot configuration
MAC address
Secure boot
nvmem
Referenced Parts
i.MX 6UL
NXP
Figure 2 shows the bank/word definition of i.MX 6UL
i.MX 8M Mini
NXP
Figure 1 shows the bank/word definition in the i.MX 8M Mini OCOTP_CTRL chapter of the reference manual
i.MX 8QXP
NXP
The output example on i.MX 8QXP is as follows:
i.MX 8XL
NXP
For devices that have SECO, like i.MX 8XL, the SCFW on the SCU manages the fuse operations.
i.MX 93
NXP
Figure 3. Fuse map spreadsheet in i.MX 93 reference manual
i.MX 943
NXP
For devices that have the SM enabled, such as i.MX 95 and i.MX 943
i.MX 95
NXP
For devices that have the SM enabled, such as i.MX 95 and i.MX 943
i.MX 7Dual
NXP
i.MX 7Dual/i.MX 7Solo No OCOTP_CTRL 4 No
i.MX 7Solo
NXP
i.MX 7Dual/i.MX 7Solo No OCOTP_CTRL 4 No
i.MX 7ULP
NXP
i.MX 7ULP No OCOTP_CTRL 8 No Legacy fuse block; no ECC
i.MX 8M
NXP
i.MX 8M No OCOTP_CTRL 4 No Legacy fuse block; no ECC
i.MX 8ULP
NXP
i.MX 8ULP/9 ELE-AP ELE-AP
i.MX 8XLite
NXP
i.MX 8/8X/8XLite SECO SECO and SCU
| MIMX9352 | NXP | nxpele -f mimx9352 -d uboot_fastboot read-common-fuse -i 129 |
| i.MX 6UL | NXP | Figure 2 shows the bank/word definition of i.MX 6UL |
| i.MX 8M Mini | NXP | Figure 1 shows the bank/word definition in the i.MX 8M Mini OCOTP_CTRL chapter of the reference manual |
| i.MX 8QXP | NXP | The output example on i.MX 8QXP is as follows: |
| i.MX 8XL | NXP | For devices that have SECO, like i.MX 8XL, the SCFW on the SCU manages the fuse operations. |
| i.MX 93 | NXP | Figure 3. Fuse map spreadsheet in i.MX 93 reference manual |
| i.MX 943 | NXP | For devices that have the SM enabled, such as i.MX 95 and i.MX 943 |
| i.MX 95 | NXP | For devices that have the SM enabled, such as i.MX 95 and i.MX 943 |
| i.MX 7Dual | NXP | i.MX 7Dual/i.MX 7Solo No OCOTP_CTRL 4 No |
| i.MX 7Solo | NXP | i.MX 7Dual/i.MX 7Solo No OCOTP_CTRL 4 No |
| i.MX 7ULP | NXP | i.MX 7ULP No OCOTP_CTRL 8 No Legacy fuse block; no ECC |
| i.MX 8M | NXP | i.MX 8M No OCOTP_CTRL 4 No Legacy fuse block; no ECC |
| i.MX 8ULP | NXP | i.MX 8ULP/9 ELE-AP ELE-AP |
| i.MX 8XLite | NXP | i.MX 8/8X/8XLite SECO SECO and SCU |