Application NoteNxp

i.MX RT1170 ECC Application (AN13204)

Guide for implementing Error-Correcting Code (ECC) on i.MX RT1170 MCU memories, including TCM, Cache, OCRAM, and external memory to enhance system reliability and safety.

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Overview

This application note provides a technical overview of Error-Correcting Code (ECC) implementation on the NXP i.MX RT1170 crossover MCU. It covers ECC features for various memory regions, including CM7 and CM4 Tightly Coupled Memory (TCM), Instruction and Data Caches, On-Chip RAM (OCRAM), and external memory via the XECC controller. The document details specific ECC algorithms used, such as Hsiao Hamming and odd-weight column criteria, and provides necessary fuse settings and software configurations for enablement. Additionally, it describes the ROM preloading process required to initialize memory, error injection methods for debugging and validation, and the use of the MCU boot utility for eFuse operations.

Use Cases

Automotive safety systems requiring high-level error detection
Industrial control systems requiring high memory reliability
Implementing functional safety in embedded applications
Debugging and validating memory error correction mechanisms
Configuring crossover MCUs for high-reliability environments

Topics

i.MX RT1170

ECC

Error-Correcting Code

TCM

OCRAM

XECC

FlexRAM

NXP

memory reliability

Hsiao Hamming

eFuse configuration

Referenced Parts

i.MX RT1060

NXP

Compared to previous i.MX RT products such as the i.MX RT1060

i.MX RT1170

NXP

i.MX RT1170 ECC Application

i.MX RT1060	NXP	Compared to previous i.MX RT products such as the i.MX RT1060
i.MX RT1170	NXP	i.MX RT1170 ECC Application