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Application NoteNxp

Implementing an 8-bit EPROM for an MC68EC040/MC68360 System

Describes a method to boot an MC68EC040/MC68360 system from a single 8-bit EPROM using the MC68360's IDMA and a PAL-based state machine to reduce costs and board space.

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Overview

This application note outlines a design concept for booting an MC68EC040 and MC68360 (QUICC) system from 8-bit memory, despite the MC68EC040's lack of native dynamic bus sizing. The solution utilizes a 26V12 PAL to manage a state machine that initially boots the MC68360 in CPU-enabled mode. The MC68360 then uses its internal IDMA to copy application code from a cost-effective 8-bit EPROM into 32-bit wide SRAM. Upon completion, the PAL triggers a secondary reset sequence, switching the MC68360 into companion mode and allowing the MC68EC040 to boot directly from the 32-bit SRAM. This method eliminates the need for expensive external bus sizers like the MC68150.

Use Cases

  • Reducing component count and board space in embedded MC68040 designs
  • Lowering system cost by using 8-bit boot memory instead of 32-bit memory
  • Implementing a glueless interface between MC68360 and MC68EC040 processors
  • Designing bootloaders for systems requiring high-speed SRAM execution from low-speed EPROM storage

Topics

MC68360
MC68EC040
QUICC
8-bit EPROM
26V12 PAL
IDMA
Companion Mode
Dynamic Bus Sizing
Boot Sequence
SRAM

Referenced Parts

MC68150

Freescale Semiconductor

using an external dynamic bus sizer, such as the MC68150

MC68360

Freescale Semiconductor

The MC68360 has a mode whereby the internal CPU32+ core may by disabled

MC68EC040

Freescale Semiconductor

providing a glueless interface to an external MC68EC040 (or other M68040 family member)

Implementing an 8-bit EPROM for an MC68EC040/MC68360 System | Design Resources