CSA-803
Tektronix
external trigger input of the oscilloscope (a CSA-803 in this case)
Application NoteMicrochip
Jitter in Clock Sources
Technical guide on clock jitter definitions, measurement methods including delay lines and PLLs, and performance impacts on high-speed communication systems.
Overview
This application note provides a comprehensive technical overview of jitter in high-speed clock sources. It defines jitter using various metrics such as Unit Intervals (UI), degrees, and absolute time, while distinguishing between deterministic pattern jitter and stochastic random jitter. The document explains how jitter affects system performance by closing eye diagrams and increasing bit error rates in synchronous communication. Two primary measurement techniques are detailed: time-domain analysis using delay lines with oscilloscopes—specifically highlighting the Tektronix CSA-803 and DL-11—and frequency-domain analysis using Phase Locked Loops (PLLs) for low-frequency characterization. It also provides guidelines for specifying clock performance based on jitter amplitude and spectral content.
Use Cases
- Designing high-speed synchronous communication systems
- Measuring clock signal integrity
- Specifying oscillator requirements for telecom equipment
- Characterizing low-frequency jitter using PLLs
- Troubleshooting bit error rate issues in digital datastreams
Topics
jitter
clock sources
Unit Interval
Phase Locked Loop
eye diagram
high-speed communication
Tektronix CSA-803
Tektronix DL-11
spectral density
synchronous systems
Referenced Parts
DL-11
Tektronix
The delayed output of the DL-11 is connected to the input of the oscilloscope.
| CSA-803 | Tektronix | external trigger input of the oscilloscope (a CSA-803 in this case) |
| DL-11 | Tektronix | The delayed output of the DL-11 is connected to the input of the oscilloscope. |