AM29F010
AMD
MC68307 processor write to Flash that demands an EPROM access time of 120ns for the AM29F010 device
Application NoteNxp
JTAG Flash Memory Programmer
Application note describing a JTAG-based Flash EPROM programmer for Motorola MC683xx processors, enabling firmware loading via a PC parallel port and IEEE 1149.1 boundary scan.
Overview
This document outlines the design and implementation of a JTAG Flash EPROM programmer used to load firmware into embedded processor systems. The solution employs an IBM-compatible PC's parallel port to interface with a target processor's JTAG Test Access Port (TAP), specifically utilizing PRELOAD and EXTEST instructions to emulate bus cycles. The programmer replicates memory write and read cycles by manipulating the boundary scan register bits, allowing for the programming of Flash or SRAM memory even when no initial firmware is present. The software supports Motorola S-record files and is configurable via input files for JTAG scan register definitions and instruction opcodes. While demonstrated using Motorola MC68307 and MC68306 processors and AMD AM29F010 Flash, the architecture is adaptable to any IEEE 1149.1 compliant device.
Use Cases
- Loading initial bootloader firmware onto blank production boards
- Field upgrades for existing embedded systems software
- In-system programming of Flash EPROM and SRAM
- Firmware recovery via JTAG boundary scan interface
Topics
JTAG
Flash Memory Programming
IEEE 1149.1
Boundary Scan
MC68307
MC68306
S-record
EXTEST
PRELOAD
Embedded Systems
TAP Controller
Referenced Parts
74ACT04
Motorola
74ACT04 inverters are used to ensure the signals from the parallel port to the target have the correct sense.
MC68306
Motorola
while the programmer was tested using MC68307 and MC68306 processor systems
MC68307
Motorola
while the programmer was tested using MC68307 and MC68306 processor systems
74ACT14
Motorola
74ACT14 74ACT04 TCK TDI TMS TDO R_CTL VCC GND PC Parallel Printer Port
AC04
Motorola
Optional Interface Circuit Target System LS05 AC32 AC04 MC68307 Processor
AC32
Motorola
Optional Interface Circuit Target System LS05 AC32 AC04 MC68307 Processor
LS05
Motorola
Optional Interface Circuit Target System LS05 AC32 AC04 MC68307 Processor
74ACT74
Motorola
Schmitt triggers (74ACT74) were used to remove potential signal bounce to the JTAG port
| AM29F010 | AMD | MC68307 processor write to Flash that demands an EPROM access time of 120ns for the AM29F010 device |
| 74ACT04 | Motorola | 74ACT04 inverters are used to ensure the signals from the parallel port to the target have the correct sense. |
| MC68306 | Motorola | while the programmer was tested using MC68307 and MC68306 processor systems |
| MC68307 | Motorola | while the programmer was tested using MC68307 and MC68306 processor systems |
| 74ACT14 | Motorola | 74ACT14 74ACT04 TCK TDI TMS TDO R_CTL VCC GND PC Parallel Printer Port |
| AC04 | Motorola | Optional Interface Circuit Target System LS05 AC32 AC04 MC68307 Processor |
| AC32 | Motorola | Optional Interface Circuit Target System LS05 AC32 AC04 MC68307 Processor |
| LS05 | Motorola | Optional Interface Circuit Target System LS05 AC32 AC04 MC68307 Processor |
| 74ACT74 | Motorola | Schmitt triggers (74ACT74) were used to remove potential signal bounce to the JTAG port |