SCM68000
NXP
The SCM68000 (EC000 core) has been redesigned to provide fully static and low power operation.
Application NoteNxp
Low Power on the SCM68000 (EC000 Core)
Technical guide for placing the NXP SCM68000 (EC000 core) into a low-power quiescent mode (<10µA) while maintaining the internal processor state.
Overview
This application note describes the recommended procedures for implementing low-power operation on the SCM68000 (EC000 core). It details the process of entering a quiescent state with a current drain of less than 10µA by utilizing supervisor mode, external address detection circuitry, and the STOP instruction. The document provides schematic diagrams for low-power circuitry for both 8-bit and 16-bit data buses, timing diagrams for stopping and restarting the CPU clock, and guidance on maintaining signal integrity during high-impedance states. Additionally, it includes a sample TRAP routine for software implementation and instructions for returning to normal operation via interrupt recognition and the RESTARTB signal.
Use Cases
- Power management in embedded systems
- Battery-operated 68k microprocessor designs
- Reducing standby power consumption in industrial controllers
- Implementing sleep/wake-up cycles in EC000-based hardware
Topics
SCM68000
EC000 Core
low power mode
quiescent current
STOP instruction
clock control
supervisor mode
NXP
Freescale
microprocessor
Referenced Parts
| SCM68000 | NXP | The SCM68000 (EC000 core) has been redesigned to provide fully static and low power operation. |