MC68360 Asynchronous HDLC Protocol Microcode User’s Manual

Overview

This technical manual describes the Asynchronous HDLC (ASYNC HDLC) controller microcode for the MC68360 Quad Integrated Communications Controller (QUICC). The document details how the microcode enables the Communications Processor Module (CPM) to perform HDLC framing and transparency functions, offloading these tasks from the CPU32+ core. Key features include automatic CRC-CCITT generation and checking, transparency encoding and decoding based on RFC 1549, and support for NMSI control signals such as CD, CTS, and RTS. The manual provides a complete programming model, including the ASYNC HDLC memory map, specific command sets for transmission and reception, and buffer descriptor structures. It also covers error handling procedures for noisy characters or carrier loss and outlines the initialization process for different QUICC hardware revisions.

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