MC68EC040
NXP
The MC68EC040 and MC68040 type master is not supported when the QUICC is configured to a master mode.
Design DocumentNxp
MC68360 Quad Integrated Communication Controller Errata and Added Information
Technical errata and supplemental data for the MC68360 QUICC user manual, covering signal descriptions, bus operations, clocking, and memory controller configuration.
Overview
This document provides critical errata and added information for the MC68360 Quad Integrated Communication Controller (QUICC) User's Manual (Revision 1). It contains corrections for signal descriptions, pin functions, and memory mapping for dual-port RAM. Detailed updates are provided for bus operations, including byte write enable equations and MC68040 companion mode bus cycle behavior. The document also addresses hardware design considerations such as Vcc ramp-up requirements for specific mask sets (Rev C.0 vs. C.1), crystal and oscillator input clock configurations for the System Integration Module (SIM), and DRAM controller register definitions for refresh cycles and page mode operation.
Use Cases
- Correcting hardware implementation based on MC68360 user manual Revision 1
- Designing clock circuits using crystals or oscillators for QUICC microprocessors
- Configuring DRAM controller registers for page mode and refresh cycles
- Troubleshooting power-on reset issues in legacy MC68360-based systems
- Interfacing MC68360 with MC68040 bus masters in companion mode
Topics
NXP
MC68360
QUICC
CPU32+
Errata
Bus Operation
DRAM Controller
PLL
MC68040
MC68030
System Integration Module
Memory Map
Referenced Parts
MC68030
NXP
it will drive normal MC68030-type bus cycles with TT1 becoming DS again.
MC68040
NXP
In MC68040 companion mode, the QUICC understands MC68040-type bus cycles but cannot generate them.
MC68360
NXP
MC68360 Quad Integrated Communication Controller User's Manual Rev 1
| MC68EC040 | NXP | The MC68EC040 and MC68040 type master is not supported when the QUICC is configured to a master mode. |
| MC68030 | NXP | it will drive normal MC68030-type bus cycles with TT1 becoming DS again. |
| MC68040 | NXP | In MC68040 companion mode, the QUICC understands MC68040-type bus cycles but cannot generate them. |
| MC68360 | NXP | MC68360 Quad Integrated Communication Controller User's Manual Rev 1 |