MPC8548E PowerQUICC III Integrated Processor Family Reference Manual

Overview

This reference manual provides detailed technical information for the NXP MPC8548E PowerQUICC III integrated processor family, including models MPC8548, MPC8547E, MPC8545E, and MPC8543E. It describes the e500 core architecture, memory map, and signal descriptions. Key integrated features detailed include the DDR memory controller, L2 cache/SRAM, e500 coherency module, and Security Engine (SEC) 2.1. The document covers high-speed interfaces such as PCI Express, Serial RapidIO, and enhanced three-speed Ethernet controllers (eTSECs), alongside global functions including DMA, local bus control, and debug facilities.

Referenced Parts