68EN360
Freescale Semiconductor
If the 68EN360 is purchased, Ethernet is available on all 4 SCCs, but for performance reasons, not all 4 SCCs may be used.
Application NoteNxp
Multiple Ethernet Channels on the QUICC (68EN360)
Technical note on configuring multiple Ethernet channels on the Freescale 68EN360 QUICC, covering performance limits, SCC configurations, and parameter RAM sharing constraints.
Overview
This application note provides implementation guidelines for utilizing multiple Ethernet channels on the Freescale (NXP) 68EN360 QUICC processor. While the hardware supports Ethernet on all four Serial Communication Controllers (SCCs), the document highlights performance considerations, noting that at 25 MHz, the device typically supports two Ethernet channels (SCC1 and SCC2) or one full-duplex channel. It details critical resource sharing constraints where SCC2, SCC3, and SCC4 share parameter RAM with other interfaces such as SPI, SMC1, SMC2, and IDMA channels, requiring careful reconfiguration when switching functions. The note also specifies pin assignments for Ethernet signals and limitations regarding external Content Addressable Memory (CAM) support on specific SCCs.
Use Cases
- Designing multi-port Ethernet systems using the 68EN360 processor
- Managing hardware resource conflicts between Ethernet and SPI/SMC interfaces
- Optimizing network performance for 25 MHz QUICC-based embedded systems
- Configuring external CAM support for Ethernet address filtering
Topics
68EN360
QUICC
Ethernet Controller
SCC
Serial Communication Controller
Parameter RAM
Freescale
NXP
SPI sharing
SMC
IDMA
Referenced Parts
| 68EN360 | Freescale Semiconductor | If the 68EN360 is purchased, Ethernet is available on all 4 SCCs, but for performance reasons, not all 4 SCCs may be used. |