RT500 Secure GPIO and Usage (AN13153)
Guide on configuring secure GPIO and the SEC_GPIO_MASK in NXP RT500 microcontrollers to prevent information leakage between secure and non-secure TrustZone domains.
Overview
This application note describes the configuration and usage of secure GPIO modules in NXP RT500 series microcontrollers. It addresses potential security vulnerabilities where non-secure software could monitor the pin states of secure peripherals through the standard GPIO read path. The document details the implementation of the Secure AHB Controller and the SEC_GPIO_MASK register, which restricts pin state visibility to the secure domain. It provides technical procedures and code snippets for initializing secure I/O, configuring the IOCON block, and managing secure GPIO interrupts within an Armv8-M TrustZone environment. A practical example using the MIMXRT595EVK evaluation board demonstrates how to mask specific pins to safeguard sensitive data from non-secure access.
Use Cases
- Protecting secure peripheral data from non-secure software monitoring
- Implementing secure signaling and input patterns for external devices
- Configuring TrustZone-based hardware resource isolation
- Securing UART or SPI pin states in high-security embedded applications