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Design DocumentNxp

Serial Bootloader for NXP MC56F82xx (AN4275)

Technical guide for implementing static and dynamic serial bootloaders on NXP MC56F82xx Digital Signal Controllers using the SCI interface.

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Overview

This design document describes the implementation of serial bootloaders for the NXP MC56F82xx family of Digital Signal Controllers (DSCs). It details two types of bootloaders: a static version that remains in flash for perpetual firmware updates and a dynamic version that erases itself after a single application download to free up memory. The document provides comprehensive instructions on program flash usage, memory mapping for MC56F824x and MC56F825x variants, and SCI0 communication protocols using the XON/XOFF standard at 115200 bps. Key technical requirements include modifications to linker command files, Vector Base Address (VBA) register initialization, and S-record file generation using ProcessorExpert. The bootloader occupies approximately 2 KB of program flash at addresses 0x7C00 to 0x7FFF.

Use Cases

  • In-field firmware updates via serial interface
  • Factory programming of application code
  • Memory-efficient application loading for DSCs
  • Implementation of custom firmware update protocols

Topics

Serial Bootloader
MC56F82xx
MC56F824x
MC56F825x
Static Bootloader
Dynamic Bootloader
S-record
SCI
Flash Programming
Digital Signal Controller
VBA register

Referenced Parts

MC56F824x

NXP

For 56F824x, the lower memory area from 0x0000 to 0x1FFF is reserved

MC56F825x

NXP

However, for 56F825x, these locations can be used for user application code because both reset vectors are located at 0x0000 to 0x0003.

MC56F82xx

NXP

Open the CPU Component Inspector by clicking “Processor Expert” of the application project window followed by double-clicking the “Cpu:MC56F82xx” icon under “CPUs” group