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Application NoteNxp

Using Code Read Protection in LPC1100 and LPC1300

An overview of Code Read Protection (CRP) levels for NXP LPC1100 and LPC1300 microcontrollers, including implementation details for the LPCXpresso IDE.

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Overview

This application note explains the Code Read Protection (CRP) security levels for NXP LPC1100 and LPC1300 microcontroller families. It details four protection modes: CRP1 (prevents read access while allowing sector-based modification), CRP2 (allows only full chip erasure), CRP3 (highest security level, disabling ISP and SWD), and NO_ISP (prevents accidental ISP invocation via the ISP pin). The document describes how these security levels impact flash memory access via Serial-Wire-Debug (SWD) and In-System Programming (ISP). It also provides technical guidance for implementing CRP using the LPCXpresso IDE, including defining security constants and configuring custom linker scripts to place the CRP word at the specific memory address 0x2FC.

Use Cases

  • Protecting proprietary software code from unauthorized read-back and reverse engineering
  • Implementing secure firmware updates and custom bootloaders
  • Preventing accidental invocation of ISP mode in noisy electrical environments
  • Securing intellectual property on LPC1100 and LPC1300 based hardware designs
  • Configuring flash memory protection levels in the LPCXpresso IDE

Topics

LPC1100
LPC1300
LPC1114
LPC1343
Code Read Protection
CRP
ISP
In-System Programming
SWD
Serial-Wire-Debug
Flash Security
LPCXpresso

Referenced Parts

LPC1114

NXP

This application note will make use of the LPCXpresso1114 or LPCXpresso1343 Evaluation boards

LPC1343

NXP

LPC1343 with CRP2 enabled (USB based ISP mode)

Using Code Read Protection in LPC1100 and LPC1300 | Design Resources