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Application NoteNxp

Using the CodeTEST Probe with Freescale MPC8260 and MPC8255 Processors

Technical guide for connecting and configuring the CodeTEST Probe with the local bus of Freescale MPC8260 and MPC8255 processors.

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Overview

This application note details the hardware requirements and configuration procedures for connecting a CodeTEST Probe to the local bus of NXP (formerly Freescale) MPC8260 and MPC8255 processors. It provides a comprehensive pin mapping table for address, data, and control signals, noting bit-wise inversions on the bus. The document specifies configuration settings for the CodeTEST Manager, including port address masks, strobe polarity, and endianness. Additionally, it outlines critical hardware limitations, such as constraints on bus frequencies over 100 MHz, requirements for non-burst memory regions, and the necessity of non-cached or write-through memory for tag ports.

Use Cases

  • Interfacing CodeTEST hardware debugging tools with MPC8260 or MPC8255 processors
  • Configuring the CodeTEST Manager for target hardware local bus monitoring
  • Establishing physical signal connections between debugging probes and processor bus pins
  • Troubleshooting bus frequency and memory alignment issues in embedded systems

Topics

MPC8260
MPC8255
CodeTEST Probe
PowerQUICC II
Local Bus
Hardware Debugging
Freescale
NXP
Probe Configuration
Bus Timing

Referenced Parts

MPC8255

Freescale

connecting the CodeTEST Probe to the local bus of the MPC8260 and MPC8255 processors

MPC8260

Freescale

connecting the CodeTEST Probe to the local bus of the MPC8260 and MPC8255 processors

Using the CodeTEST Probe with Freescale MPC8260 and MPC8255 Processors | Design Resources