Search Results for &quot; 7143LA55J8 &quot;

SRAM 32K(2KX16)CMOS DUALPORT R

Not Recommended for New Design

Access Time: 55ns

Address Bus Width: 22b

Package/Case: PLCC

Density: 32Kb

SRAM 32K(2KX16)CMOS DUALPORT R

Not Recommended for New Design

Access Time: 55ns

Address Bus Width: 22b

Package/Case: PLCC

Density: 32Kb

Integrated Device Technology

PLCC-68, Reel

QCCJ, LDCC68,1.0SQ

Obsolete

Max Operating Temperature: 70

Number of Terminals: 68

Min Operating Temperature: 0

Terminal Position: QUAD

7143LA55JG

SRAM Chip Async Dual 5V 32K-Bit 2K x 16 55ns 68-Pin PLCC

Unknown

Access Time: 55ns

Address Bus Width: 22b

Package/Case: PLCC

Density: 32Kb

7143LA55JB

SRAM Chip Async Dual 5V 32K-Bit 2K x 16 55ns 68-Pin PLCC Tube

Unknown

Package/Case: PLCC

RoHS Compliant: No

7143LA55JGB

SRAM Chip Async Dual 5V 32K-Bit 2K x 16 55ns 68-Pin PLCC

Unknown

Package/Case: PLCC

RoHS Compliant: No

Search Results for "7143LA55J8"

Filters

7143LA55J8

SRAM 32K(2KX16)CMOS DUALPORT R

Not Recommended for New Design

Access Time: 55ns

Address Bus Width: 22b

Package/Case: PLCC

Density: 32Kb

SRAM 32K(2KX16)CMOS DUALPORT R

Not Recommended for New Design

Access Time: 55ns

Address Bus Width: 22b

Package/Case: PLCC

Density: 32Kb

Integrated Device Technology

PLCC-68, Reel

QCCJ, LDCC68,1.0SQ

Obsolete

Max Operating Temperature: 70

Number of Terminals: 68

Min Operating Temperature: 0

Terminal Position: QUAD

7143LA55JG

SRAM Chip Async Dual 5V 32K-Bit 2K x 16 55ns 68-Pin PLCC

Unknown

Access Time: 55ns

Address Bus Width: 22b

Package/Case: PLCC

Density: 32Kb

7143LA55JB

SRAM Chip Async Dual 5V 32K-Bit 2K x 16 55ns 68-Pin PLCC Tube

Unknown

Package/Case: PLCC

RoHS Compliant: No

7143LA55JGB

SRAM Chip Async Dual 5V 32K-Bit 2K x 16 55ns 68-Pin PLCC