SRAM Chip Async Dual 5V 512K-Bit 64K x 8 55ns 84-Pin PLCC T/R
IDT 7008S55J8 technical specifications.
| Access Time | 55ns |
| Address Bus Width | 32b |
| Package/Case | PLCC |
| Density | 512Kb |
| Interface | Parallel |
| Lead Free | Contains Lead |
| Length | 29.2mm |
| Max Operating Temperature | 70°C |
| Memory Size | 512Kb |
| Memory Type | RAM, , SDR |
| Min Operating Temperature | 0°C |
| Max Supply Voltage | 5.5V |
| Min Supply Voltage | 4.5V |
| Mount | Surface Mount |
| Number of Ports | 2 |
| Number of Words | 64000 |
| Operating Supply Voltage | 5V |
| Package Quantity | 200 |
| Packaging | Tape and Reel |
| Radiation Hardening | No |
| RoHS Compliant | No |
| Supply Current | 270mA |
| Sync/Async | Asynchronous |
| Thickness | 3.63mm |
| Width | 29.2mm |
| Word Size | 8b |
| RoHS | Not CompliantNo |
No datasheet is available for this part.
