SRAM Chip Async Dual 5V 8K-Bit 1K x 8 100ns 52-Pin PLCC
IDT 7130SA100JG technical specifications.
| Access Time | 100ns |
| Address Bus Width | 20b |
| Package/Case | PLCC |
| Density | 8Kb |
| Max Operating Temperature | 70°C |
| Min Operating Temperature | 0°C |
| Max Supply Voltage | 5.5V |
| Min Supply Voltage | 4.5V |
| Mount | Surface Mount |
| Number of Ports | 2 |
| Number of Words | 1000 |
| Operating Supply Voltage | 5V |
| Packaging | Rail/Tube |
| RoHS Compliant | Yes |
| Supply Current | 155mA |
| Sync/Async | Asynchronous |
| Word Size | 8b |
| RoHS | Compliant |
No datasheet is available for this part.
