16-bit microcontroller featuring a CISC/RISC instruction set architecture and a ROMLess design. This surface-mount device utilizes a Metric Quad Flat Package (MQFP) with 80 pins, a 0.65mm pin pitch, and gull-wing leads. It operates at a maximum clock and CPU frequency of 20 MHz, includes 1KB of RAM, and offers 63 programmable I/Os. The component supports SPI and USART interfaces and operates within a voltage range of 3.3V, with an extended temperature range of -40°C to 85°C.
PackageMQFP
MountingSurface Mount
Quick Jump:
Technical Specifications
Infineon C161KLMHAFXQMA1 technical specifications.
General
| Basic Package Type | Lead-Frame SMT |
| Package Family Name | QFP |
| Package/Case | MQFP |
| Package Description | Metric Quad Flat Package |
| Lead Shape | Gull-wing |
| Pin Count | 80 |
| PCB | 80 |
| Package Length (mm) | 14 |
| Package Width (mm) | 14 |
| Package Height (mm) | 2 |
| Seated Plane Height (mm) | 2.45(Max) |
| Pin Pitch (mm) | 0.65 |
| Package Weight (g) | 0.96 |
| Package Material | Plastic |
| Mounting | Surface Mount |
| Jedec | MO-108BE-1 |
| Family Name | C166 |
| Data Bus Width | 16bit |
| Instruction Set Architecture | CISC|RISC |
| Maximum Clock Rate | 20MHz |
| Maximum CPU Frequency | 20MHz |
| Device Core | C166 |
| Program Memory Type | ROMLess |
| RAM Size | 1KB |
| Number of Programmable I/Os | 63 |
| Programmability | No |
| Number of Timers | 3 |
| Interface Type | SPI/USART |
| CAN | 0 |
| I2C | 0 |
| SPI | 1 |
| Ethernet | 0 |
| UART | 0 |
| USART | 1 |
| USB | 0 |
| I2S | 0 |
| Max Operating Supply Voltage | 3.6V |
| Min Operating Temperature | -40°C |
| Max Operating Temperature | 85°C |
Compliance
| Cage Code | CG091 |
| EU RoHS | Yes |
| HTS Code | 8542310001 |
| Schedule B | 8542310000 |
| Automotive | No |
| AEC Qualified | No |
| PPAP | No |
| RoHS Versions | 2011/65/EU, 2015/863 |
Datasheet
Infineon C161KLMHAFXQMA1 Datasheet
Download the complete datasheet for Infineon C161KLMHAFXQMA1 to view detailed technical specifications.
This datasheet cannot be embedded due to technical restrictions.