N-channel enhancement mode Power MOSFET with 100V drain-source voltage and 20A continuous drain current. Features 22mOhm maximum drain-source resistance at 10V Vgs and 2.1V gate threshold voltage. This dual dual drain device utilizes OptiMOS process technology and is housed in an 8-pin TDSON EP surface-mount package with no leads, measuring 5.15mm x 5.9mm x 1mm. Operates across a temperature range of -55°C to 175°C.
PackageTDSON EP
MountingSurface Mount
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Technical Specifications
Infineon IPG20N10S4L-22 technical specifications.
General
| Basic Package Type | Non-Lead-Frame SMT |
| Package Family Name | SON |
| Package/Case | TDSON EP |
| Lead Shape | No Lead |
| Pin Count | 8 |
| PCB | 8 |
| Package Length (mm) | 5.15 |
| Package Width (mm) | 5.9 |
| Package Height (mm) | 1 |
| Seated Plane Height (mm) | 1 |
| Pin Pitch (mm) | 1.27 |
| Package Material | Plastic |
| Mounting | Surface Mount |
| Configuration | Dual Dual Drain |
| Category | Power MOSFET |
| Channel Mode | Enhancement |
| Channel Type | N |
| Number of Elements per Chip | 2 |
| Process Technology | OptiMOS |
| Maximum Drain Source Voltage | 100V |
| Maximum Gate Source Voltage | ±16V |
| Maximum Continuous Drain Current | 20A |
| Maximum Gate Threshold Voltage | 2.1V |
| Maximum Drain Source Resistance | 22@10VmOhm |
| Typical Gate Charge @ Vgs | 21@10VnC |
| Typical Gate Charge @ 10V | 21nC |
| Typical Input Capacitance @ Vds | 1350@25VpF |
| Maximum Power Dissipation | 60000mW |
| Min Operating Temperature | -55°C |
| Max Operating Temperature | 175°C |
Compliance
| Cage Code | CG091 |
| EU RoHS | Yes with Exemption |
| HTS Code | 8541290095 |
| Schedule B | 8541290080 |
| ECCN | EAR99 |
| Automotive | Yes |
| AEC Qualified | Yes |
| RoHS Versions | 2011/65/EU, 2015/863 |
Datasheet
Infineon IPG20N10S4L-22 Datasheet
Download the complete datasheet for Infineon IPG20N10S4L-22 to view detailed technical specifications.
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