16Mbit SDRAM chip, 1Mx16 organization, offering 16-bit data bus width and 12-bit address bus width. Features a maximum clock rate of 100 MHz, two internal banks, and 512K words per bank. Packaged in a 60-pin TFBGA with a 0.65mm pin pitch, this surface-mount component operates at a typical 1.8V supply voltage.
PackageTFBGA
MountingSurface Mount
Quick Jump:
Technical Specifications
Integrated Silicon Solution IS42VS16100F-10BL technical specifications.
General
| Basic Package Type | Ball Grid Array |
| Package Family Name | BGA |
| Package/Case | TFBGA |
| Package Description | Thin Fine Pitch Ball Grid Array |
| Lead Shape | Ball |
| Pin Count | 60 |
| PCB | 60 |
| Package Length (mm) | 10.1 |
| Package Width (mm) | 6.4 |
| Package Height (mm) | 0.85(Max) |
| Seated Plane Height (mm) | 1.2(Max) |
| Pin Pitch (mm) | 0.65 |
| Package Material | Plastic |
| Mounting | Surface Mount |
| Density | 16Mbit |
| Type | SDRAM |
| Organization | 1Mx16 |
| Data Bus Width | 16bit |
| Maximum Clock Rate | 100MHz |
| Number of Internal Banks | 2 |
| Number of Words per Bank | 512K |
| Maximum Access Time | 8|7ns |
| Density in Bits | 16777216bit |
| Address Bus Width | 12bit |
| Maximum Operating Current | 50mA |
| Typical Operating Supply Voltage | 1.8V |
| Max Operating Supply Voltage | 1.9V |
| Min Operating Supply Voltage | 1.7V |
| Min Operating Temperature | 0°C |
| Max Operating Temperature | 70°C |
Compliance
| Cage Code | 1J9V2 |
| EU RoHS | Yes |
| HTS Code | 8542320002 |
| Schedule B | 8542320015 |
| ECCN | EAR99 |
| Automotive | No |
| AEC Qualified | No |
| PPAP | No |
| Radiation Hardening | No |
| RoHS Versions | 2011/65/EU, 2015/863 |
Datasheet
Integrated Silicon Solution IS42VS16100F-10BL Datasheet
Download the complete datasheet for Integrated Silicon Solution IS42VS16100F-10BL to view detailed technical specifications.
This datasheet cannot be embedded due to technical restrictions.