
Field Programmable Gate Array (FPGA) with 89,178 logic cells and 452 user I/Os, built on 40nm process technology. Features 6.375 Gbps transceiver speed across 12 transceiver blocks and 32 SERDES channels, supporting multiple differential and single-ended I/O standards. Includes 6679 Kbit RAM, 448 18x18 multipliers, 56 dedicated DSP blocks, and 1 Ethernet MAC. Operates within a 0°C to 85°C temperature range, packaged in a 1152-pin, 35x35mm Flip Chip Fine Pitch Ball Grid Array (FC-FBGA) for surface mounting.
Intel EP2AGX95EF35C6NES technical specifications.
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